1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to a semiconductor device comprising metal-insulator-metal (MIM) capacitor.
2. Description of the Related Art
In semiconductor devices used in communication equipment or cellular phones using microwaves, transistors that use compound semiconductors as elements for low noise amplifiers suited to radio-frequency operation are used for down-sizing and performance improvement of semiconductor devices.
In such semiconductor devices, for example, multistage amplifiers, transistors are used as elements for amplifiers, and DC power is supplied thereto. In order that the source of such DC power does not adversely affect the RF properties of elements for amplifiers, capacitors are connected to DC power terminals; and in order to isolate DC power between amplifier stages, capacitors are connected between stages.
FIG. 30 is a circuit diagram of a conventional amplifier.
In FIG. 30, reference numeral 200 denotes the amplifier shown here by the circuit diagram. Reference numerals 202 and 204 denote field effect transistors (hereafter abbreviated as FETs), and reference numerals 206 and 208 denote grounding ends. The source terminals of the FETs 202 and 204 are grounded by the grounding ends 206 and 208, respectively.
Reference numerals 210, 212, 214, and 216 denote DC electrodes.
DC power is supplied to the gate terminal of the FET 202 from the DC electrode 210; to the drain terminal of the FET 202 from the DC electrode 212; to the gate terminal of the FET 204 from the DC electrode 214; and to the drain terminal of the FET 202 from the DC electrode 216. Reference numerals 218, 220, 222, 224, and 226 denote capacitors used in this amplifier.
Reference numerals 228, 230, 232, and 234 denote the paths of electric current flowing in the FETs 202 and 204. The path 228 is the path of the gate current of the FET 202, the path 230 is the path of the drain current of the FET 202, the path 232 is the path of the gate current of the FET 204, and the path 234 is the path of the drain current of the FET 204.
FIG. 31 is a plan showing a capacitor used in a conventional amplifier. FIG. 32 is a sectional view of the capacitor shown in FIG. 31 along the dashed line 32xe2x80x9432.
Reference numeral 236 denotes an MIM capacitor. Such an MIM capacitor 236 is used as capacitors 218, 220, 222, 224, and 226 of the amplifier shown in FIG. 30.
In FIGS. 31 and 32, reference numeral 238 denotes a circuit substrate, 240 denotes a wiring layer, 242 denotes a lower electrode, 244 denotes a dielectric layer, 246 denotes an upper electrode, 248 denotes a connecting conductor, and 250 denotes a back conductor.
The amplifier 200 is normally formed as an MMIC (monolithic microwave integrated circuit), and all of the circuit elements are constituted on a semiconductor chip. Therefore, the MIM capacitors 236 used as capacitors 218, 220, 222, 224, and 226 must also be tested not to be defective. This test must include a withstand voltage test normally using a DC voltage, and is conducted by grounding one terminal of the capacitor, and impressing a voltage to the other terminal.
In the amplifier 200, the case is considered where a high voltage is impressed to the DC electrode 210 for conducting the withstand voltage test of the capacitor 218. At this time, the capacitor 218 and the FET 202 are in such a relationship as they are connected in parallel between the DC electrode 210 and the grounding end.
FIG. 33 is a schematic diagram showing an equivalent circuit of a capacitor and a transistor in a conventional amplifier.
In FIG. 33, reference numeral 252 denotes a DC electrode, for example the DC electrode 210. Reference numeral 254 denotes a capacitor, for example the capacitor 218. Reference numeral 256 denotes a resistor element, for example, the resistor component of the FET 202 is equivalently shown. Reference numeral 258 denotes a current path.
When a voltage is impressed to the DC electrode 210 to conduct the withstand voltage test of the capacitor 218, since the capacitor 218 and the FET 202 are connected in parallel relative to the grounding end, a current flows dominantly in the current path 258 as shown in the equivalent circuit of FIG. 33. Therefore, even if one tries to impress a voltage required for the withstand voltage test of the capacitor 218 corresponding to the capacitor 254, a large current flows in the FET 202 corresponding to the resistor element 256, and the withstand voltage test of the capacitor 218 cannot be conducted.
The same situations occur also in capacitors 220, 222, 224, and 226. Therefore, a method must be used wherein the operation test of the amplifier 200 is conducted for a long time to check the occurrence of defective capacitors before shipping. Consequently, it takes a long time for the manufacturing process of amplifiers, and defective products may be detected in the final process, resulting in an increase in the costs of the amplifiers.
Japanese Patent Laid-Open No. Hei 9(1997)-74144, corresponding to U.S. Pat. No. 5,801,413 discloses a semiconductor device comprising capacitance elements having an excellent area efficiency by constituting capacitors of the same constitution as the memory cell capacitors in a DRAM memory, and describes that the capacitance elements are connected in series, and a pad is provided on the connecting point in the middle, which is used as the testing pad for testing defective insulating films. However, this prior technique does not use MIM capacitors, and the connecting relationship with transistors is also different.
The present invention has been devised to solve the above problems.
According to one aspect of the invention, there is provided a semiconductor device comprising: a substrate having a main surface, an MIM capacitor having a first electrode layer disposed on the main surface of the substrate, second and third electrode layers facing the first electrode layer through a dielectric layer; a terminal pad connected to the first electrode layer of the MIM capacitor; a first terminal connected to the second electrode layer of the MIM capacitor; a second terminal connected to the third electrode layer of the MIM capacitor; and a first active element whose first electrode is connected to the second electrode layer of the MIM capacitor.
Accordingly, the withstand voltage test of MIM capacitors can be conducted without damaging the first active element, defective products can be eliminated in the early stages of the process, and the yield of the final products can be improved. In its turn, semiconductor devices of a high reliability can be provided at low costs.
Other objects and advantages of the invention will become apparent from the detailed description given hereinafter. It should be understood, however, that the detailed description and specific embodiments are given by way of illustration only since various changes and modifications within the scope of the invention will become apparent to those skilled in the art from this detailed description.